On SRAM bit-cells once again

Noises and variations are ubiquitous, but are still being ill-understood and in most cases treated simplistically, leading in most cases to substantial overdesign costs. A novel reliability-centric design method based on unconventionally sizing transistors has been suggested lately. In this paper our aim is to design, simulate, and compare the benefits of unconventional sizing when applied to ultra-low voltage (ULV) SRAM cells. We will show that unconventionally sized SRAM cells achieve higher SNM´s than classically sized SRAM cells (hence it is to be expected that they will work correctly at lower supply voltages).