A time-mode translinear principle for implementing analog multiplication

Analog computation traditionally processes information as differences in voltage or current amplitudes. With technology scaling resulting in reduced headroom and limited dynamic range, time-mode computation has emerged as a viable approach for low-power high-precision analog signal processing. Time mode circuits use differences in time to represent information. So far, only linear relationships between voltage/current and time has been explored for applications in data conversion, frequency synthesis and signal processing. In this paper, we present a time-mode analog of the well-known “translinear” principle using linear RC circuits and exploiting the exponential relationship between voltage and time for step charging or discharging of the capacitor. We present basic circuit analysis and utilize the technique to implement a simple single quadrant analog multiplier in an 180nm CMOS process. At 1.8V supply, the multiplier consumes approximately 5mW for a sampling frequency of 100kHz and a maximum input peak-to-peak voltage swing of 0.8V. The average non-linearity error is 0.44%. The time mode translinear principle could facilitate high dynamic range, high precision, complex linear and nonlinear arithmetic and other signal processing functions.