Title :
A SAW-less 0.5–2.5 GHz receiver front-end with 80 dB 3rd order harmonic rejection ratio
Author :
Long Chen ; Tao Xia ; Ying Guo ; Huailin Liao
Author_Institution :
Key Lab. of Microelectron. Devices & Circuits (MOE), Peking Univ., Beijing, China
Abstract :
This paper presents a 65 nm SAW-less receiver front-end. Using 3-phase clocks for impedance translation, an RF filter with 3rd order harmonic rejection is obtained. Employing this filter as the front-end´s input matching network and a two-stage low noise amplifier´s load, a 3rd order RF filter is realized. In addition, by using 3-phase 1/3-duty-cycle LO, a 3rd order harmonic rejection mixer is realized. The mixer´s harmonic rejection ratio is less sensitive to gain and phase error compared to conventional 8-phase mixers, since the 3-path´s gain ratio is 1:2:1. These two techniques enhance 3rd order harmonic rejection ratio to 80 dB in case of 6% duty-cycle error, 2% gain error and 0.5° phase error. The front-end achieves a noise figure of 3-6 dB from 0.5 GHz to 2.5 GHz, consumes 21-33 mW power from a 1.2 V voltage supply and occupies an area of 0.35 mm2.
Keywords :
harmonics suppression; low noise amplifiers; radio receivers; radiofrequency filters; surface acoustic wave filters; RF filter; SAW-less receiver front-end; duty-cycle LO; frequency 0.5 GHz to 2.5 GHz; gain error; harmonic rejection mixer; harmonic rejection ratio; impedance translation; input matching network; low noise amplifier load; noise figure; phase clocks; phase error; power 21 mW to 33 mW; size 0.35 mm; size 65 nm; voltage 1.2 V; Band-pass filters; Gain; Harmonic analysis; Impedance; Mixers; Power harmonic filters; Radio frequency; 3-phase harmonic rejection mixer; 3-phase impedance translation; 3rd order harmonic rejection; SAW-less; receiver front-end;
Conference_Titel :
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location :
Melbourne VIC
Print_ISBN :
978-1-4799-3431-7
DOI :
10.1109/ISCAS.2014.6865095
