A reliable brain computer interface implemented on an FPGA for a mobile dialing system

Author

Chih-Wei Feng ; Ting-Kuei Hu ; Jui-Chung Chang ; Wai-Chi Fang

Author_Institution

Dept. of Electr. Eng. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2014

fDate

1-5 June 2014

Firstpage

654

Lastpage

657

Abstract

This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six frequency bands (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose a phone number by gazing at the display interface. This proposed EEG system has been implemented in Field-Programmable Gate Arrays (FPGA), and shows high accuracy, high integration density, and low cost. These features are meaningful for implementing a real-time SSVEP-based BCI.

Keywords

brain-computer interfaces; electroencephalography; field programmable gate arrays; mobile computing; visual evoked potentials; CCA; EEG system; FPGA; canonical correlation analysis; display interface; field-programmable gate arrays; mobile dialing system; real-time SSVEP-based BCI; reliable brain computer interface; steady-state visual evoked potential; Accuracy; Brain-computer interfaces; Correlation; Electroencephalography; Field programmable gate arrays; Hardware; Matrix decomposition;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2014 IEEE International Symposium on

Conference_Location

Melbourne VIC

Print_ISBN

978-1-4799-3431-7

Type

conf

DOI

10.1109/ISCAS.2014.6865220

Filename

6865220