FPGA implementation of low latency scalable Elliptic Curve Cryptosystem processor in GF(2m)

This paper presents the architecture of a scalable elliptic curve cryptography (ECC) processor (ECP). Two versions of scalable ECPs are presented, one for binary field pseudo-random curves and one for binary field Koblitz curves. The implementations of these designs are able to support all 5 key sizes of pseudo-random or Koblitz curves recommended by the National Institute of Standards and Technology (NIST) without reconfiguring the hardware. The paper proposes an architecture of a finite field multiplier that uses the Karatsuba-Ofman algorithm in order to reduce the latency of the finite field multiplication for larger key sizes. As a result, the latency of the overall elliptic curve point multiplication (ECPM) is reduced compared to previous designs of the scalable ECPs. To the authors´ best knowledge, the proposed scalable ECPs are the fastest ECPs that can support all 5 pseudo-random or Koblitz curves recommended by NIST.