A low-power reconfigurable CMOS power amplifier for wireless sensor network applications

Author

Nan Zheng ; Jaeyoung Kim ; Mazumder, Prasenjit

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA

fYear

2014

fDate

1-5 June 2014

Firstpage

1086

Lastpage

1089

Abstract

In this paper, a detailed methodology for designing a low-power high-efficiency power amplifier (PA) is presented. The trade-off between high efficiency and low output power is highlighted. An example is described to validate the proposed design method. Simulated peak efficiency up to 50.3% has been achieved with all components on-chip. Furthermore, a tunable power amplifier with efficiency enhanced at output power back-off region is proposed for more efficient operation.

Keywords

CMOS integrated circuits; power amplifiers; tuning; wireless sensor networks; components on-chip; low-power high-efficiency power amplifier; low-power reconfigurable CMOS power amplifier; output power back-off region; peak efficiency; tunable power amplifier; wireless sensor network applications; CMOS integrated circuits; Impedance matching; Power amplifiers; Power generation; Resistance; Transmitters; Wireless sensor networks; CMOS power amplifier; low power; tunable matching network; wireless sensor network;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2014 IEEE International Symposium on

Conference_Location

Melbourne VIC

Print_ISBN

978-1-4799-3431-7

Type

conf

DOI

10.1109/ISCAS.2014.6865328

Filename

6865328