Title :
Current-mode clock distribution
Author :
Islam, Rashed ; Guthaus, Matthew R.
Author_Institution :
Dept. of CE, Univ. of California Santa Cruz, Santa Cruz, CA, USA
Abstract :
We propose a new paradigm for clock distribution that uses current, rather than voltage, to distribute a global clock signal with reduced power consumption. While current-mode (CM) signaling has been used in one-to-one signals, this is the first usage in a one-to-many clock distribution network. To accomplish this, we create a new high-performance current-mode pulsed flip-flop (CMPFF) using a representative 45 nm CMOS technology. When the CMPFF is combined with a CM transmitter, the first CM clock distribution network exhibits 45.2% lower average power compared to traditional voltage mode clocks.
Keywords :
CMOS logic circuits; clock distribution networks; current-mode circuits; flip-flops; CM clock distribution network; CM signaling; CM transmitter; CMPFF; current-mode clock distribution; current-mode signaling; global clock signal; high-performance current-mode pulsed flip-flop; one-to-many clock distribution network; reduced power consumption; representative CMOS technology; size 45 nm; voltage mode clocks; CMOS integrated circuits; CMOS technology; Clocks; Delays; Integrated circuit interconnections; Power demand; Transistors;
Conference_Titel :
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location :
Melbourne VIC
Print_ISBN :
978-1-4799-3431-7
DOI :
10.1109/ISCAS.2014.6865357
