A 20-MHz BW 75-dB SFDR shifted-averaging VCO-based ΔΣ modulator

A ΔΣ modulator with dual-VCO-based quantizers is proposed to enhance SFDR of the converter. To alleviate the nonlinear VCO voltage-to-frequency tuning characteristics, a shifted-averaging dual VCO architecture is proposed. Furthermore, a VCO which merges a voltage summer and a current DAC for excess loop delay compensation is designed, drastically reducing the complexity of the circuit. The measured results of the proposed modulator implemented in a 65-nm CMOS technology demonstrates a peak SNDR of 65.2 dB and a peak SFDR of 75.4 dB at 21.1-mW power, with a 20-MHz bandwidth.