ESD protection design for wideband RF applications in 65-nm CMOS process

Author

Li-Wei Chu ; Chun-Yu Lin ; Ming-Dou Ker ; Ming-Hsiang Song ; Jen-Chou Tseng ; Chewn-Pu Jou ; Ming-Hsien Tsai

Author_Institution

Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan

fYear

2014

fDate

1-5 June 2014

Firstpage

1480

Lastpage

1483

Abstract

All wireless communication products must meet the reliability specifications during mass production. To prevent from electrostatic discharge (ESD) damages, the ESD protection designs must be added at all input/output pads in chip. Some ESD protection designs with low parasitic capacitance for radio-frequency (RF) applications are reviewed in this paper. Besides, a novel ESD protection design is proposed and realized in a 65nm CMOS process to protect the wideband RF circuits. In this work, diodes are used for ESD protection and inductors are used for high-frequency performance fine tuning. Experimental results of the test circuits have been successfully verified.

Keywords

CMOS integrated circuits; electrostatic discharge; integrated circuit design; integrated circuit reliability; radiofrequency integrated circuits; CMOS process; ESD protection design; diodes; electrostatic discharge; high-frequency performance fine tuning; inductors; input-output pads; low parasitic capacitance; mass production; radio-frequency applications; reliability specifications; size 65 nm; wideband RF circuits; wireless communication products; CMOS integrated circuits; Electrostatic discharges; Inductors; Parasitic capacitance; Radio frequency; Robustness; Wideband; Diode; ESD; T-coil; radio-frequency (RF); wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2014 IEEE International Symposium on

Conference_Location

Melbourne VIC

Print_ISBN

978-1-4799-3431-7

Type

conf

DOI

10.1109/ISCAS.2014.6865426

Filename

6865426