A statistic based time skew calibration method for time-interleaved ADCs

Author

Qiu Lei ; Yuanjin Zheng ; Di Zhu ; Siek, Liter

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore

fYear

2014

fDate

1-5 June 2014

Firstpage

2373

Lastpage

2376

Abstract

In this paper, a statistic based time skew calibration method for time-interleaved ADCs is presented. By comparing the mean value of the multiplication of signals in two adjacent channels, the time skew can be estimated. Subsequently, a capacitor array based digitally controlled delay block placed in sampling clock path is adopted to compensate the time skew. In addition, the precision of calibration is further improved through using a monotonic small capacitor array. In a 4-channel 1GS/s 12-bit TI-ADC system, the spurious free dynamic range (SFDR) can be improved to 77.5dB with 0.25ps LSB in the digitally controlled delay block.

Keywords

analogue-digital conversion; calibration; delay circuits; statistics; adjacent channel; analog-digital converter; digitally controlled delay block; mean value; monotonic small capacitor array; sampling clock; signal multiplication; statistic based time skew calibration method; time interleaved ADC; time skew estimation; Analog-digital conversion; Arrays; Bandwidth; Calibration; Capacitors; Clocks; Delays;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2014 IEEE International Symposium on

Conference_Location

Melbourne VIC

Print_ISBN

978-1-4799-3431-7

Type

conf

DOI

10.1109/ISCAS.2014.6865649

Filename

6865649