DocumentCode
1772589
Title
Design of a 2D graphics front-end rendering processor
Author
Yun-Nan Chang ; Ting-Chi Tong
Author_Institution
Dept. of Comput. Sci. & Eng., Nat. Sun Yat-sen Univ., Kaohsiung, Taiwan
fYear
2014
fDate
18-20 June 2014
Firstpage
70
Lastpage
71
Abstract
This paper presents an application-specific processor for the transformation and tessellation operations in 2D graphics front-end rendering process. In order to accelerate the curve tessellation, this processor utilizes a dedicated cubic bezier-curve (CBC) unit based on the modified adaptive forwarddifference (FD) algorithm to efficiently locate the intersection points of a curve with all the scan-lines. In addition, the processor´s main arithmetic unit can support the value lookup of several special arithmetic functions in order to fasten the transform operations. Our preliminary results show that our processor consumes less than 200k gates, and can achieve the rendering speed of more than 60 frames per second (fps) for several major benchmarks in QCIF resolution. Since the proposed processor is programmable, it can be further extended easily to support more complex graphics effects in future.
Keywords
rendering (computer graphics); system-on-chip; 2D graphics front end rendering processor; CBC unit; FD algorithm; adaptive forward difference; application specific processor; arithmetic unit; complex graphics effects; curve tessellation; dedicated cubic bezier curve; programmable processor; system-on-a-chip technology; tessellation operations; transformation operations; Assembly; Computer architecture; Logic gates; Registers; Rendering (computer graphics); Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-specific Systems, Architectures and Processors (ASAP), 2014 IEEE 25th International Conference on
Conference_Location
Zurich
Type
conf
DOI
10.1109/ASAP.2014.6868634
Filename
6868634
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