Compressed sensing based direct conversion receiver with interference reducing sampling strategy

This paper describes a direct conversion receiver applying compressed sensing with the objective to relax the analog filtering requirements seen in the traditional architecture. The analog filter is cumbersome in an Integrated Circuit (IC) design and relaxing its requirements is an advantage in terms of die area, performance and robustness of the receiver. The objective is met by a selection of sampling pattern matched to the prior knowledge of the frequency placement of the desired and interfering signals. A simple numerical example demonstrates the principle. The work is part of an ongoing research effort and the different project phases are explained.