Abstract :
Recent progress in nano-dimension semiconductor technology enabled implementation of a very complex multi-processor system on a single chip (MPSoC). This facilitated a rapid progress in mobile and autonomous computing, global networking and wire-less communication. Numerous new sorts of cyber-physical systems became technologically feasible and economically justified. Various mobile and autonomous systems performing monitoring, control, communication, visualization or combination of these tasks and being parts of different objects, installations, machines or devices, or even being wearable or implanted in human or animal body can serve as examples. However, many of the new cyber-physical applications are very complex and heterogeneous, while at the same time they require a very high throughput or low reaction time, ultra-low energy consumption and high flexibility. The combination of the huge complexity with stringent requirements results in numerous serious design challenges, such as: accounting in design for more aspects and related complex multi-objective MPSoC optimization, adequate resolution of numerous complex design tradeoffs, reduction of the design productivity gap, time-to market and development costs without compromising the system quality, etc. To overcome these challenges both the system and design methodology have to be adequately adapted. The presentation introduces an advanced system technology being the industrial ASIP-based MPSoC technology of Intel Benelux, used a. o. in multiple newest generation smart-phones and tablets of many market leaders (e.g. Acer, Apple, Asus, Lava, Lenovo, NVIDIA, etc.), to subsequently discuss a new design methodology and design automation for this technology developed by the combined industry and academia consortium of the European research project ASAM (Automatic Architecture Synthesis and Application Mapping for MPSoCs based on adaptable ASIPs). After introducing a new ASAM design flow for the ASIP-based MPSoCs, th- presentation focuses on the automatic architecture exploration of the ASIP-based sub-systems. In particular, it discusses several new tools developed by the research team of the presenter for the combined exploration of the application parallel structures and corresponding parallel ASIP architectures.
