DocumentCode :
1772822
Title :
Evolutionary design of approximate multipliers under different error metrics
Author :
Vasicek, Zdenek ; Sekanina, Lukas
Author_Institution :
IT4Innovations Centre of Excellence, Brno Univ. of Technol., Brno, Czech Republic
fYear :
2014
fDate :
23-25 April 2014
Firstpage :
135
Lastpage :
140
Abstract :
Approximate circuits are digital circuits which are intentionally designed in such a way that the specification is not met in terms of functionality in order to obtain some improvements in power consumption, performance or area, in comparison with fully functional circuits. In this paper, we propose to design approximate circuits using evolutionary design techniques. In particular, different error metrics are utilized to assess the circuit functionality. The proposed method begins with a fully functional circuit which is then intentionally degraded by Cartesian genetic programming (CGP) to obtain a circuit with a predefined error. In the second phase, CGP is used to minimize the number of gates or another error criterion. The effect of various error metrics on the search performance, area and power consumption is evaluated in the task of multiplier design.
Keywords :
circuit optimisation; genetic algorithms; logic design; multiplying circuits; power consumption; CGP; Cartesian genetic programming; approximate circuit design; approximate multiplier design; digital circuits; error criterion; error metrics; evolutionary design techniques; fully functional circuits; power consumption; Approximation methods; Delays; Equations; Logic gates; Optimization; Power demand;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems, 17th International Symposium on
Conference_Location :
Warsaw
Print_ISBN :
978-1-4799-4560-3
Type :
conf
DOI :
10.1109/DDECS.2014.6868777
Filename :
6868777
Link To Document :
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