Bus Driver controller with hazard detection for FlexRay protocol 3.0.1

A Bus Driver (BD) controller design is presented in this investigation, where all of the hazard detection and protection required by FlexRay 3.0.1 are integrated and realized, including under-voltage (UV), bus failure, wake-up detection, etc. The required 4-state transition for FlexRay BD control is also carried out to coordinate the interfacing and signaling among the ECU (electronic control unit) Host and the analog BD frontend. The entire proposed design is implemented on silicon using 0.18 μm 60 V BCD CMOS process. The area is 819×612 μm², and the system clock is 80 MHz based on the all-PVT-corner post-layout simulation. The proposed BD controller design is the first reported controller meet the requirements of FlexRay 3.0.1 protocol.