ESD reliability influence of a 60 V power LDMOS by the FOD-based (& Dotted-OD) drain

An LDMOS (lateral-diffused MOS) is often used to as the ESD device in a high-voltage circuit for its low on-resistance benefit. But, it has several serious disadvantages, including the V_h value is not high enough and the device in a multi-finger structure can´t completely turn on which resulting in the ESD capability per unit length is very low. So, the non-uniform turned-on phenomenon is seriously impacted the robustness of ESD reliability. Therefore, this paper is based on the drain FOD structure of an nLDMOS, and which will change the OD structure for contacts located in the drain-side. The OD structure will renew as some dotted-ODs layout. Experimental results show that the dotted-OD layout has a higher ESD capability than the FOD structure, and the layout type of dotted-OD will affect the ESD capability of an HV component, where a uniformly distributed type of dotted-OD will have a highest I_t2 value, the I_t2 value is increased about 12% as compared with the traditional LDMOS. The V_h value will increase with the contacts number increasing within the dotted-OD, therefore, this structure can also effectively improve the latch-up (LU) immunity.