• DocumentCode
    1774247
  • Title

    A new level up shifter for HVICs with high noise tolerance

  • Author

    Akahane, Masashi ; Jonishi, Akihiro ; Yamaji, Masaharu ; Kanno, Hayato ; Tanaka, T. ; Nishio, H. ; Sumida, Hitoshi

  • Author_Institution
    Fuji Electr. Co., Ltd., Matsumoto, Japan
  • fYear
    2014
  • fDate
    18-21 May 2014
  • Firstpage
    2302
  • Lastpage
    2309
  • Abstract
    In this paper, a new level up shifter with high dV/dt and negative transient voltage noise immunities is presented. The proposed level up shifter achieves high noise immunity without an increase in the delay time of high-voltage ICs (HVICs). A fabricated 1200 V-class HVIC adopting the proposed level up shifter on a p-type substrate indicates a stable operation under the conditions of dV/dt noise over 50 kV/μs and negative transient voltage noise of -150 V. And we have confirmed the good performances of a 3-phase inverter driven by the fabricated HVIC.
  • Keywords
    integrated circuit manufacture; integrated circuit noise; invertors; power integrated circuits; 3-phase inverter; HVlC fabrication; dV/dt noise; level up shifter; negative transient voltage noise immunity; noise tolerance; p-type substrate; voltage 1200 V; voltage 150 V; Discrete wavelet transforms; Latches; Surges; dV/dt noise; gate driver; level shift; negative transient voltage noise;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA), 2014 International
  • Conference_Location
    Hiroshima
  • Type

    conf

  • DOI
    10.1109/IPEC.2014.6869911
  • Filename
    6869911