Title :
Dynamic budgeting for settling DRAM contention of co-running hard and soft real-time tasks
Author :
Flodin, Jonas ; Lampka, Kai ; Wang Yi
Author_Institution :
Dept. of Inf. Technol., Uppsala Univ., Uppsala, Sweden
Abstract :
In modern non-customized multicore architectures, computing cores commonly share large parts of the memory hierarchy. This paper presents a scheme for controlling the sharing of main memory among cores, respectively the concurrently executing real-time tasks. This is important for the following: concurrent memory accesses are served sequentially by the memory controller. As task execution stalls until memory fetches are served, the latter significantly contributes to the execution time of the tasks. With multiple real-time tasks concurrently competing for the access to the memory, the main memory can easily become the Achilles heel for the timing correctness of the tasks. To provide hard timing guarantees, release of access requests issued to the main memory has therefore to be controlled. Run-time budgeting is a well accepted technique for controlling and coordinating the use of a shared resource, particularly when the underlying hardware cannot be altered. Whilst guaranteeing timing correctness of the hard real-time applications, worst-case based resource budgeting commonly leads to performance degradations of the co-running (so called soft real-time) applications. In this paper we propose to combine worst-case based resource budgeting with run-time monitoring for dynamically reconfiguring the budget schemes. Thereby we aim at increasing the responsiveness of the soft real-time applications, while satisfying the strict timing constraints of the co-running hard real-time tasks. We have implemented the proposed scheme in a microkernel and present its empirical evaluation for which an industrial benchmark suite has been employed.
Keywords :
DRAM chips; multiprocessing systems; real-time systems; DRAM contention; concurrent memory access; dynamic budgeting; hard real-time tasks; industrial benchmark suite; memory controller; memory hierarchy; multicore architectures; resource budgeting; run-time budgeting; run-time monitoring; soft real-time tasks; Bandwidth; Bismuth; Delays; Multicore processing; Real-time systems; Servers;
Conference_Titel :
Industrial Embedded Systems (SIES), 2014 9th IEEE International Symposium on
Conference_Location :
Pisa
DOI :
10.1109/SIES.2014.6871199