Coordinationof the diode and capacitor in the Tx line for the protection of the chipsetfrom EOS

This paper proposes a PCB design method of highspeed signal interface that is robust against electrical overstress (EOS). Surge and electrostatic discharge (ESD) waveforms as defined in the International Electro-technical Commission (IEC)61000-4 standard were used for EOS input waveforms from the connector to the printed circuit board (PCB). Signals in the Tx line of the universal serial bus 3.0 (USB3.0) interface were simulated to analyze the role of the diode and capacitor in the interface circuit, and it was found that the proposed capacitor and diode coordination shows the best combination of schematics for the prevention of EOS. Experiments with an interface circuit in a laptop computer were also performed and the results show that the effectiveness of proposed design is valid.