A low phase noise CMOS voltage-controlled differential ring oscillator

Author

Rahul, R. ; Thilagavathy, R.

Author_Institution

Dept. of ECE, Nat. Inst. of Technol., Tiruchirappalli, India

fYear

2014

fDate

10-11 July 2014

Firstpage

1025

Lastpage

1028

Abstract

The paper presents a novel low phase noise voltage-controlled ring oscillator designed in UMC 0.18μm technology. The proposed design contains nine stages of differential delay cells with multiple-pass loop architecture. Linear frequency - voltage characteristics are exhibited over a wide tuning range. The tuning range of nine-stage ring oscillator is 1.1-2.3 GHz. A phase noise of -108.13dBc/Hz was estimated at an offset of 1MHz from a center frequency of 1.8 GHz. The design uses a 1.8V supply and consumes a maximum power of 65mW while operating at 1.8GHz.

Keywords

CMOS integrated circuits; UHF oscillators; phase noise; voltage-controlled oscillators; CMOS voltage-controlled oscillator; UMC technology; differential delay cells; differential ring oscillator; frequency 1.1 GHz to 2.3 GHz; linear frequency-voltage characteristics; low phase noise; multiple-pass loop architecture; power 65 mW; size 0.18 mum; voltage 1.8 V; Delays; Phase noise; Ring oscillators; Voltage control; Voltage-controlled oscillators; CMOS; phase noise; phase-locked loops (PLLs); ring oscillators; voltage-controlled oscillators (VCOs);

fLanguage

English

Publisher

ieee

Conference_Titel

Control, Instrumentation, Communication and Computational Technologies (ICCICCT), 2014 International Conference on

Conference_Location

Kanyakumari

Print_ISBN

978-1-4799-4191-9

Type

conf

DOI

10.1109/ICCICCT.2014.6993110

Filename

6993110