• DocumentCode
    1776885
  • Title

    A brief overview of the challenges of the multicore roadmap

  • Author

    Collet, Jacques Henri

  • Author_Institution
    LAAS, Univ. de Toulouse, Toulouse, France
  • fYear
    2014
  • fDate
    19-21 June 2014
  • Firstpage
    22
  • Lastpage
    29
  • Abstract
    Multicore chips are widely seen as the solution to continue the race toward ever more processing power, or in short, the continuation of Moore´s Law. However, this poses many difficult challenges at different abstraction levels, as the preservation of dependability in the physical layer (related to the reduction of dimensions), the consumption and dissipation of the energy, the selection of the physical architecture beyond the current symmetric multiprocessing, the definition of a distributed operating system, and last but not least, the automatic and seamlessly parallelization of applications. Although many problems have been studied separately for a long time by academics, finding a satisfactory trade-off is an open issue. We will begin by reviewing the different challenges. Then, we will focus on the problem of dependability in the physical layer, and especially on the Network on Chip (NoC). Here, the future is in the generalization of total self-healing to NoCs, i.e., in self-detection of errors, self-diagnosis of faults, and self-repair at runtime, while preserving the efficiency of communications in the presence of an increasing percentage of defective elements. We shall briefly discuss the numerous constraints which apply to self-healing NoCs, and make that numerous tradeoffs are possible. The subject is widely open.
  • Keywords
    multiprocessing systems; network-on-chip; Moore law; defective elements; distributed operating system; energy consumption; energy dissipation; error self-detection; fault self-diagnosis; multicore chips; multicore roadmap; network on chip; physical architecture; self-healing NoCs; self-repair; symmetric multiprocessing; Fault tolerance; Fault tolerant systems; Message systems; Multicore processing; Physical layer; Routing; Routing protocols; Routing protocols; fault tolerant systems; multicore processing; reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Mixed Design of Integrated Circuits & Systems (MIXDES), 2014 Proceedings of the 21st International Conference
  • Conference_Location
    Lublin
  • Print_ISBN
    978-83-63578-03-9
  • Type

    conf

  • DOI
    10.1109/MIXDES.2014.6872145
  • Filename
    6872145