A novel mixed-signal digital CMOS fuzzy logic controller in current mode

This article discusses about a fuzzy controller. The fuzzifier is designed with a novel structure which is more suitable than other topologies and it has a high accuracy and speed. The processing unit, inference engine, is extracted out of reference [1] that is able to generate both maximum and minimum of its inputs currents simultaneously. Ultimately, the defuzzifier is simple and the center of area (COA) is used in this section. The simulation results are performed in Hspice (level 49) under CMOS 0.18μm technology. The inference speed of this controller (with two inputs, one output and sixteen rules) is about 42.6 MFLIPS.