DocumentCode
1777028
Title
Simulink model of GFSK demodulator based on time-to-digital converter
Author
Wiechowski, Lukasz ; Siwiec, Krzysztof ; Kopanski, Jakub ; Pleskacz, Witold A.
Author_Institution
Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Warsaw, Poland
fYear
2014
fDate
19-21 June 2014
Firstpage
338
Lastpage
341
Abstract
A model of GFSK (Gaussian Frequency Shift Keying) signal demodulator that makes use of time to digital conversion is presented. It has been implemented in the Simulink environment. The performance of the demodulator is investigated for various values of design parameters. Process variations, delay line length, delay cell jitter and delay value are modeled and analyzed. The proposed model can be used to set requirements for the electrical design that lead to satisfying Bluetooth BER (Bit Error Rate) required performance (0.1%) in the optimal way.
Keywords
error statistics; frequency shift keying; time-digital conversion; Bluetooth BER; GFSK demodulator; Gaussian frequency shift keying signal demodulator; Simulink environment; bit error rate; time-to-digital converter; Bit error rate; Computer architecture; Delays; Demodulation; Jitter; Microprocessors; Noise; Bluetooth; Gaussian frequency shift keying (GFSK) demodulator; Simulink model; delay line; time-to-digital converter (TDC);
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits & Systems (MIXDES), 2014 Proceedings of the 21st International Conference
Conference_Location
Lublin
Print_ISBN
978-83-63578-03-9
Type
conf
DOI
10.1109/MIXDES.2014.6872213
Filename
6872213
Link To Document