Title :
Substrate coupling noise considerations for frequencies up to 100GHz
Author :
Gerakis, Vasileios ; Hatzopoulos, Alkis
Author_Institution :
Dept. of Electr. & Comput. Eng., Aristotle Univ. of Thessaloniki, Thessaloniki, Greece
Abstract :
This work presents a study on the substrate noise coupling between two interconnects. Two different doping profiles are simulated for various interconnect distances and different metal layers assuming a 65 nm bulk CMOS technology. A proper data analysis methodology is presented, including z and s parameters extraction and de-embedding procedure.
Keywords :
CMOS integrated circuits; field effect MIMIC; integrated circuit interconnections; integrated circuit noise; semiconductor doping; CMOS technology; S parameter extraction; Z parameter extraction; data analysis methodology; de-embedding procedure; doping profiles; interconnect distances; interconnects; metal layers; size 65 nm; substrate coupling noise; Conductivity; Couplings; Doping profiles; Metals; Noise; Scattering parameters; Substrates; Interconnect coupling; Substrate noise;
Conference_Titel :
Mixed Design of Integrated Circuits & Systems (MIXDES), 2014 Proceedings of the 21st International Conference
Conference_Location :
Lublin
Print_ISBN :
978-83-63578-03-9
DOI :
10.1109/MIXDES.2014.6872216
