What can we really expect from 2D materials for electronic applications?

Ultra-thin two-dimensional materials are the recipient of high expectations by both research community and Industry, for their intrinsic electrical properties to be exploited in device applications. While it is nowadays clear that bare graphene will not manage to comply with ITRS [1] requirements for beyond-CMOS devices due to its main limitation i.e., the lack of a bandgap, hopes have been shifted towards 2D heterostructures, as well as alternative two-dimensional materials like Transition Metal Dichalcogenides (TMDs). In this presentation, we will quantitatively discuss performance of a broad range of 2D-material based devices through atomistic simulations, performed by means of the open-source code NanoTCAD ViDES. In particular, we will first focus on heterostructure based devices, which have already been demonstrated to provide large I_on/I_off ratios, as for example lateral heterostructure FET [3] (Fig.1a, LHFET), and FETs based on vertical graphene-based heterostructures as in [4] (Fig. 1b VHFET) and in [5] (Fig. 1c, barristor). We will show that despite all the three solutions manages to provide large I_on/I_off ratios, the vertical structures have poor sub-threshold swing, and need large supply voltages to operate in normal conditions, unaffordable for digital applications (Fig. 2). Due to their extreme thickness, short-channel effects are strongly reduced in 2D-material based devices, which translates in an optimal control of the gate over the channel barrier, and which could be exploited in tunnel FET devices. We will show that Bi₂Se₃ could represent an option for TFET devices.