Artificial synapses using ferroelectric memristors embedded with CMOS Circuit for image recognition

Memristors have attracted attention as devices for brain-inspired computing hardware, such as artificial neural networks [1]. Typical neural networks comprise multiple neurons interconnected via synapses. A synapse modulates the signal transmission strength or “weight” between two neurons. Weight controllability is essential to neural network adaptability. Therefore, it is necessary to establish an artificial synapse that can modulate its own electric conductance, which represents the weights. Some researchers have used two-terminal memristors as synapses [2,3]. However, when using conventional memristors, pulses with complex shapes corresponding to what is learned must be prepared and applied to both terminals simultaneously because of their two-terminal structures [4]. Previously, we showed that a programmable synapse function could be implemented on a three-terminal ferroelectric memristor (3T-FeMEM) fabricated on a single crystal oxide substrate, which enabled simple learning schemes [5]. In this work, synapse chips were fabricated by integrating 3T-FeMEMs on CMOS circuits. We then demonstrated on-chip associative memory function using a neural network circuit with these chips.