A high conversion gain millimeter-wave frequency doubler in 65nm CMOS

Author

Liu Yang ; Li Zhiqun ; Li Qin ; Wang Chong ; Wang Zhigong

Author_Institution

Inst. of RF- & OE-ICs, Southeast Univ., Nanjing, China

fYear

2014

fDate

June 30 2014-July 3 2014

Firstpage

1

Lastpage

4

Abstract

This paper presents a high conversion gain doubler-balanced active frequency doubler for millimeter-wave application. The frequency doubler contains an improved push-push structure, two quarter-wavelength transmission lines, and output power enhancement using negative resistor. The 3-dB band of the frequency doubler is 19~28 GHz of input frequency, the maximum conversion gain reaches -5.3 dB, the fundamental rejection is above 55 dB, and the power consumption is 17 mW under 1.2V VDD. The frequency doubler is designed in 65nm CMOS process.

Keywords

CMOS analogue integrated circuits; frequency multipliers; millimetre wave integrated circuits; CMOS process; frequency 19 GHz to 28 GHz; high conversion gain doubler-balanced active frequency doubler; millimeter-wave application; negative resistor; output power enhancement; power 17 mW; push-push structure; quarter-wavelength transmission lines; size 65 nm; voltage 1.2 V; CMOS integrated circuits; CMOS technology; Frequency conversion; Frequency synthesizers; Gain; Microwave circuits; Resistors; 65nm CMOS; conversion gain; frequency doubler; milllimeter-wave (MMW);

fLanguage

English

Publisher

ieee

Conference_Titel

Ph.D. Research in Microelectronics and Electronics (PRIME), 2014 10th Conference on

Conference_Location

Grenoble

Type

conf

DOI

10.1109/PRIME.2014.6872661

Filename

6872661