DocumentCode
1777516
Title
An improved DC-link voltage equalization for Three-Level Neutral-Point Clamped converters
Author
Porru, Mario ; Serpi, Alessandro ; Marongiu, Ignazio ; Damiano, Alfonso
Author_Institution
Dept. of Electr. & Electron. Eng., Univ. of Cagliari, Cagliari, Italy
fYear
2014
fDate
June 30 2014-July 3 2014
Firstpage
1
Lastpage
4
Abstract
A DC-link voltage equalization algorithm (DCL-E) for Three-Level Neutral-Point Clamped converters (NPCs) is proposed in this paper. It consists of appropriately regulating DC-link currents with the aim of equalizing DC-link voltages as fast as possible, minimizing capacitor voltage and current ripple and prioritizing NPC load requirements at the same time. This goal is achieved by means of suitable PWM patterns, which also guarantee an appropriate DC-link capacitor exploitation over both transient and steady state operation. The effectiveness of the proposed DCL-E is verified through a simulation study, which refers to the case of a three-phase NPC that feeds a Surface-Mounted Permanent Magnet Synchronous Machine.
Keywords
PWM power convertors; permanent magnet machines; power capacitors; synchronous machines; DCL-E; NPC load requirements; PWM patterns; capacitor voltage minimization; current ripple minimization; dc-link capacitor exploitation; dc-link currents; dc-link voltage equalization algorithm; steady state operation; surface-mounted permanent magnet synchronous machine; three-level neutral-point clamped converters; transient state operation; Capacitors; Inverters; Permanent magnet machines; Pulse width modulation; Steady-state; Switches; Voltage control; Current control; Neutral-point clamped converter; Pulse width modulation; Three-level converter;
fLanguage
English
Publisher
ieee
Conference_Titel
Ph.D. Research in Microelectronics and Electronics (PRIME), 2014 10th Conference on
Conference_Location
Grenoble
Type
conf
DOI
10.1109/PRIME.2014.6872676
Filename
6872676
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