A modified CMOS nano-power resistorless current reference circuit

In this work, all MOS current reference circuit is proposed using a standard 0.18 μm technology and the simulations were performed using the Cadence Spectre simulator. The proposed current reference circuit is based on, the resistorless current reference circuit suggested by Oguey and Aebishcher. The Oguey´s circuit is capable of generating the reference current in a nanoampere range, but with the high temperature coefficient (TC). The reason for high TC, that we found, is the lack of control over the gate-source voltage of an active resistor used in the design. This gate-source voltage is one of the controlling parameters responsible to obtain adequate thermal compensation for the reference current. In the proposed work, we modified the architecture to limit the variation of the gate-source voltage with the temperature and hence controls the thermal behaviour of the reference current. The working supply voltage of the proposed circuit ranges from 1.25 V to 2 V. The temperature coefficients of the reference current generated from the proposed and conventional architectures are 39.8 ppm/°C and 545.12 ppm/°C respectively at a supply voltage of 1.25V for the temperature ranging from -60°C to 85°C. The maximum power consumption of proposed and conventional architecture is 624.8nW and 468.59nW at a supply voltage of 2 V with the layout area of 0.0013μm² and 0.001μm² respectively.