A low power second order current mode continuous time sigma delta ADC with 98 dB SNDR

A second order CT ΣΔ modulator for audio frequency sensory systems in 180μm TSMC CMOS process is presented. The overall power consumption is distributed evenly among segments of the loop to attain adequate number of bits without the need to sacrifice power. The design incorporates a C-gm based current mode structure with 2nd order noise shaping, a 25 kHz bandwidth, a sampling frequency of 12.8 MHz marking an OSR of 256 and a total power consumption of 4.3μW. Consequently the proposed loop achieves a FOM of 1fJ/conv.