Continuous time analog to digital conversion in interferer resistant wake up radios

Continuous time digital filtering offers the possibility of implementing low power, tunable, low frequency filters required for interferer rejection in ultra low power radios. The bottleneck of such architectures lies in the limited linearity of the continuous time analog to digital conversion (CT-ADC) stage. This paper presents an interferer resistant wake-up radio architecture based on continuous time digital filters and discusses different ways of improving the linearity of the analog to digital conversion stage without sacrificing its power consumption.