DocumentCode
1778160
Title
Pre-bond testing of weak defects in TSVs
Author
Arumi, Daniel ; Rodriguez-Montanes, R. ; Figueras, Jaume
Author_Institution
Dept. d´Eng. Electron., Univ. Politec. de Catalunya, Barcelona, Spain
fYear
2014
fDate
7-9 July 2014
Firstpage
31
Lastpage
36
Abstract
Through Silicon Vias (TSVs) are critical elements in three dimensional integrated circuits (3-D ICs) and may undergo defects during the fabrication process and also during their life time. The detection of defective TSVs in the earliest process step is of major concern. For this reason, testing TSVs is usually done at different stages of the fabrication process. In fact, effective pre-bond testing is a key factor to prevent stacking yield loss. Extensive research effort has been devoted to develop efficient pre-bond techniques. In this direction, two main approaches have been explored: pre-bond probing and built-in self test (BIST) techniques. Pre-bond probing is challenging since TSVs are too small for standard test probes and the number of probe pads for testing is not affordable. Present BIST proposals have some disadvantages depending on the particular solution considered, namely: the detection of certain types of defects solely, inability to detect weak defects, large area overhead and long test application time. In this context, this work proposes a simple solution, adding low area overhead and fast application test procedure. Simulation results confirm the proposal viability.
Keywords
built-in self test; integrated circuit testing; three-dimensional integrated circuits; 3D ICs; BIST; area overhead; built-in self test techniques; defective TSV detection; fabrication process; fast application test procedure; long test application time; pre-bond probing techniques; pre-bond testing; stacking yield loss; standard test probes; three dimensional integrated circuits; through silicon vias; weak defect detection; Built-in self-test; Circuit faults; Circuit stability; Proposals; Resistance; Through-silicon vias;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium (IOLTS), 2014 IEEE 20th International
Conference_Location
Platja d´Aro, Girona
Type
conf
DOI
10.1109/IOLTS.2014.6873668
Filename
6873668
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