A noise-tolerant master-slave flip-flop

A new flip-flop design, called a duration-observation master-slave flip-flop, is proposed and evaluated. This dependable design takes into account a noise pulse induced on data signal lines. If the noise pulse occurs around the data-sampling time (i.e., clock edge), the conventional master-slave flip-flop samples an erroneous value and holds it because the flip-flop regards the noise pulse as a proper data signal. The proposed master-slave flip-flops monitor the duration time of the input signal when flip-flops change from a master-latch behavior to a slave-latch behavior, and thus they can prevent malfunction caused by the noise pulse. The proposed flip-flops have two advantages: they do not require any additional control signals, and their implementation and application to existing synchronous digital circuits is easy. The effectiveness of proposed design is demonstrated by circuit simulation. The proposed flip-flops are implemented using fewer transistors than that of a duplication structure and the width of the noise pulse to be blocked is adjustable.