Energy-efficient Hadamard-based SATD architectures

In this paper we present energy-efficient Hadamard-based Sum of Absolute Transformed Differences (SATD) architectures. We relied on two state of the art methods for SATD, one using the Fast Hadamard Transform (FHT) butterfly and another one using the so-called Transform-Exempted (TE) SATD algorithm. Those were combined with architectural decisions, as the use of a transpose buffer. A total of six Hadamard-based SATD architectures were synthesized for a commercial 45 nm standard cell library. The best energy results are related to TE-SATD architectures: down to 7.62 pJ/SATD in the case of parallel architecture with pipeline. However, considering also the area results when evaluating energy, the best results are achieved when both methods are applied to the transpose buffer base architecture: nearly 10 pJ/SATD with up to 71% smaller area compared with parallel base architectures.