Experimental verification of timing measurement circuit with self-calibration

Author

Chujo, Takeshi ; Hirabayashi, Daiki ; Congbing Li ; Kobayashi, Yoshiyuki ; Junshan Wang ; Kobayashi, Hideo ; Katoh, Kentaroh ; Koshi, Sato

Author_Institution

Div. of Electron. & Inf., Gunma Univ., Kiryu, Japan

fYear

2014

fDate

17-19 Sept. 2014

Firstpage

1

Lastpage

6

Abstract

This paper describes the architecture, implementation and measurement results for a Time-to-Digital Converter (TDC), with histogram-method self-calibration, for high-speed I/O interface circuit test applications. We have implemented the proposed TDC using a Programmable System-on-Chip (PSoC), and measurement results show that TDC linearity is improved by the self-calibration. All TDC circuits, as well as the self-calibration circuits can be implemented as digital circuits, even by using FPGA instead of full custom ICs, so this is ideal for fine CMOS implementation with short design time.

Keywords

CMOS logic circuits; calibration; field programmable gate arrays; integrated circuit testing; logic testing; system-on-chip; time measurement; time-digital conversion; CMOS implementation; FPGA; PSoC; TDC circuits; TDC linearity; digital circuits; high-speed I/O interface circuit test; histogram-method self-calibration; programmable system-on-chip; self-calibration circuits; time-to-digital converter; timing measurement circuit; Calibration; Clocks; Delays; Histograms; Linearity; Ring oscillators; FPGA; Histogram Method; Self-Calibration; Time Measurement; Time-to-Digital Converter;

fLanguage

English

Publisher

ieee

Conference_Titel

Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW), 2014 19th International

Conference_Location

Porto Alegre

Type

conf

DOI

10.1109/IMS3TW.2014.6997393

Filename

6997393