DocumentCode :
1783253
Title :
TBPoint: Reducing Simulation Time for Large-Scale GPGPU Kernels
Author :
Jen-Cheng Huang ; Lifeng Nai ; Hyesoon Kim ; Lee, Hsien-Hsin S.
fYear :
2014
fDate :
19-23 May 2014
Firstpage :
437
Lastpage :
446
Abstract :
Architecture simulation for GPGPU kernels can take a significant amount of time, especially for large-scale GPGPU kernels. This paper presents TBPoint, an infrastructure based on profiling-based sampling for GPGPU kernels to reduce the cycle-level simulation time. Compared to existing approaches, TBPoint provides a flexible and architecture-independent way to take samples. For the evaluated 12 kernels, the geometric means of sampling errors of TBPoint, Ideal-Simpoint, and random sampling are 0.47%, 1.74%, and 7.95%, respectively, while the geometric means of the total sample size of TBPoint, Ideal-Simpoint, and random sampling are 2.6%, 5.4%, and 10%, respectively. TBPoint narrows the speed gap between hardware and GPGPU simulators, enabling more and more large-scale GPGPU kernels to be analyzed using detailed timing simulations.
Keywords :
graphics processing units; multiprocessing systems; sampling methods; TBPoint; architecture simulation; cycle-level simulation time reduction; ideal-Simpoint; large-scale GPGPU kernels; profiling-based sampling; random sampling; sampling errors; Computational modeling; Hardware; Instruction sets; Kernel; Markov processes; Mathematical model; Vectors; GPGPU; performance modeling; sampling; simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium, 2014 IEEE 28th International
Conference_Location :
Phoenix, AZ
ISSN :
1530-2075
Print_ISBN :
978-1-4799-3799-8
Type :
conf
DOI :
10.1109/IPDPS.2014.53
Filename :
6877277
Link To Document :
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