Title :
Laboratory framework TEAM for investigating the dependability issues of microprocessor systems
Author :
Jasnetski, Artjom ; Ubar, Raimund ; Tsertov, Anton ; Kruus, Helena
Author_Institution :
Dept. of Comp. Eng., Tallinn Univ. of Technol., Tallinn, Estonia
Abstract :
We propose a laboratory research and student training oriented framework consisting of Test Evaluation Automated Means (TEAM) as a set of tools for evaluating the quality of test programs for microprocessors and systems. TEAM enables students to learn and analyze the dependability issues of microprocessor systems, to create their own designs and develop test programs, to analyze the quality of testing, and to make decisions about improving the testability of systems. The tool set in TEAM is mostly open and consists of the assembly level test converter, register transfer level test program simulator, global test converter into local test sequences for modules of the system, and gate-level fault simulator. The general ideas of hands-on laboratory training supported by TEAM are outlined. The research tasks of test program generation can be set up in a way that enables a competition between students, and as a consequence, motivates them to better understand the problems of testing of complex systems and their dependability.
Keywords :
circuit simulation; computer aided instruction; electronic engineering education; integrated circuit design; integrated circuit reliability; integrated circuit testing; microprocessor chips; student experiments; TEAM laboratory framework; assembly level test converter; complex system testing; dependability analysis; gate-level fault simulator; global test converter; hands-on laboratory training; local test sequences; microprocessor systems; register transfer level test program simulator; student training oriented framework; test evaluation automated means; test program quality evaluation; Built-in self-test; Educational institutions; Logic gates; Microprocessors; Program processors; Training; behaviour level test generation; high-level decision diagrams; microprocessor systems; register transfer and gate level simulation;
Conference_Titel :
Microelectronics Education (EWME), 10th European Workshop on
Conference_Location :
Tallinn
DOI :
10.1109/EWME.2014.6877400