DocumentCode :
1785429
Title :
A high input dynamic range, low voltage cascode current mirror and enhanced phase-margin folded cascode amplifier
Author :
Akbari, Mohammad ; Javid, A. ; Hashemipour, Omid
Author_Institution :
Microelectron. Lab., Shahid Beheshti Univ., Tehran, Iran
fYear :
2014
fDate :
20-22 May 2014
Firstpage :
77
Lastpage :
81
Abstract :
A new adaptive biased cascode current mirror is presented. The proposed cascode current mirror has advantage of simplicity with low voltage operation without using any other bias currents or voltages. With proposed self-biasing configuration, large dynamic input current with high accuracy can be maintained without increasing input resistance or limiting output swing. Also, the proposed low voltage cascode mirror is incorporated in folded cascode amplifier in order to enhance its phase margin (PM). The Enhanced PM Folded Cascode amplifier has unity gain bandwidth of 84 MHz and consumes 720 μW @ 1.8 V with phase margin of 88 . The proposed circuits are designed and simulated in standard 0.18μm CMOS technology.
Keywords :
CMOS analogue integrated circuits; current mirrors; CMOS technology; adaptive biased cascode current mirror; bandwidth 84 MHz; bias currents; bias voltage; high input dynamic range low voltage cascode current mirror; low voltage operation; phase margin; phase-margin folded cascode amplifier; power 720 muW; self-biasing configuration; size 0.18 mum; unity gain bandwidth; voltage 1.8 V; Dynamic range; Gain; Low voltage; Mirrors; Poles and zeros; Resistors; Transistors; current mirror; dynamic range; folded cascode amplifier; phase margin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Engineering (ICEE), 2014 22nd Iranian Conference on
Conference_Location :
Tehran
Type :
conf
DOI :
10.1109/IranianCEE.2014.6999507
Filename :
6999507
Link To Document :
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