DocumentCode
1785657
Title
A CMOS-memristive self-learning neural network for pattern classification applications
Author
Payvand, Melika ; Rofeh, Justin ; Sodhi, Avantika ; Theogarajan, Luke
Author_Institution
Univ. of California Santa Barbara, Santa Barbara, CA, USA
fYear
2014
fDate
8-10 July 2014
Firstpage
92
Lastpage
97
Abstract
Memristors have proven to be powerful analogs of neural synapses. While there have been some efforts to exploit this feature, the intrinsic analog nature of the memristive element has not been fully utilized. This paper presents a hardware-efficient neuromorphic CMOS-memristor pattern classifier. The system takes advantage of the memristor as a true analog memory, and Spike Timing Dependent Plasticity (STDP) is utilized to program memristors in a recurrent neural network. System co-simulations are performed in Verilog-AMS with CMOS devices and previously published memristive models. The results indicate the power of this approach in pattern classification using unsupervised learning.
Keywords
CMOS integrated circuits; electronic engineering computing; hardware description languages; memristors; pattern classification; plasticity; recurrent neural nets; unsupervised learning; CMOS-memristive self-learning neural network; STDP; Verilog-AMS; hardware-efficient neuromorphic CMOS-memristor pattern classifier; recurrent neural network; spike timing dependent plasticity; true analog memory; unsupervised learning; Adaptation models; CMOS integrated circuits; Capacitors; Charge pumps; Computational modeling; Memristors; Neurons; Adaptive learning; Memristors; Neural networks; Spike Timing Dependent Plasticity (STDP); Unsupervised learning; VLSI learning circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanoscale Architectures (NANOARCH), 2014 IEEE/ACM International Symposium on
Conference_Location
Paris
Type
conf
DOI
10.1109/NANOARCH.2014.6880486
Filename
6880486
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