DocumentCode
1786187
Title
Modelling and analysis of wireless communication over Networks-on-Chip
Author
Kumar, Ajit ; Kapoor, Hemangee K.
Author_Institution
Dept. of CSE, Indian Inst. of Technol., Guwahati, Guwahati, India
fYear
2014
fDate
16-18 July 2014
Firstpage
1
Lastpage
6
Abstract
Multi-cores and many-cores are becoming the next computing platform with the interconnection bus becoming the new bottleneck. The bus is replaced by a Network-on-Chip (NoC) for scalability issues. However, the NoC still being RC-wire based links, there are limitations in the transmission speed. As we reach far more denser integration, the problem is likely to aggravate. Wireless interconnects holds a good promise to solve the speed and scalability issue. In this paper we analyse the improvements offered by wireless links as shortcut interconnects in wormhole based NoCs. We measure latency and throughput and observe their variations by altering congestion level, represented by Packet Injection Rate (PIR) and channel count. Using a simple Media Access Control (MAC) protocol we analyse the effect of number of channels and traffic, demonstrating the advantage of using wireless NoC.
Keywords
access protocols; network-on-chip; radio links; MAC protocol; PIR; RC-wire based links; channel count; congestion level; interconnection bus; many-cores; media access control protocol; multicores; networks-on-chip; packet injection rate; transmission speed; wireless communication; wireless interconnects; wireless links; wormhole based NoC; Bandwidth; Delays; Receivers; Routing; Throughput; Wireless communication; Wireless sensor networks; Network on Chips; NoC performance analysis; Noxim; Wireless NoC; Wireless simulation; Wormhole routing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design and Test, 18th International Symposium on
Conference_Location
Coimbatore
Print_ISBN
978-1-4799-5088-1
Type
conf
DOI
10.1109/ISVDAT.2014.6881044
Filename
6881044
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