A positive level shifter for high speed symmetric switching in flash memories

In this paper, a novel positive level shifter is designed for high speed interfacing between the digital circuits operating at 1.2V and the memory core circuits operating at high voltages in flash memories. The proposed design is also validated for a wide range of output voltage levels and has been optimized to perform efficiently across the different process corners and temperatures. For the targeted design of 1.2V and 33 MHz input signal to 4V output signal, the level shifter has a symmetric switching speed with a rise time and fall time of 2ns and 1.89ns respectively while the average power consumption of 0.056mW is obtained in the typical condition. Simulation results are compared with various other conventional positive level shifters at different process corners and temperatures.