Timing-driven Steiner tree construction on uniform λ-geometry

The multi-net rectilinear Steiner tree construction with the objective of wirelength minimization for routing in VLSI has received a lot of attention in the last few decades. And as it has been observed now that non-Manhattan routing reduces the wirelength more than the traditional Manhattan routing, the routing in alternate directions are gaining increased interest. But there has not been much work on timing-driven non-Manhattan routing. In this paper, we propose an Elmore delay based method for construction of uniform λ-geometry Steiner trees. Also we have used a strategy to reduce the set of Steiner points as only a small fraction of it actually remains in the final tree. We have implemented the algorithm for creating rectilinear and hexagonal Steiner trees on OR library benchmarks. Both delay and wirelength improvement of Y routing over M routing is observed. Using the reduced Steiner set, our algorithm runs quite fast on nets with large number of pins for which the existing methods even fail to generate a solution. Since our method is not dependent on the routing architecture, it can be applied to any uniform orientation.