• DocumentCode
    17865
  • Title

    Two-step continuous-time incremental sigma-delta ADC

  • Author

    Tao, Shifei ; Rodriguez, Saul ; Rusu, Ana

  • Author_Institution
    Sch. of ICT, KTH R. Inst. of Technol., Stockholm, Sweden
  • Volume
    49
  • Issue
    12
  • fYear
    2013
  • fDate
    June 6 2013
  • Firstpage
    749
  • Lastpage
    751
  • Abstract
    A two-step continuous-time (CT) incremental sigma-delta (IΣΔ) ADC, which enhances the performance of conventional CT IΣΔ ADCs, is proposed. By pipelining two second-order CT IΣΔ ADCs, the proposed two-step architecture can achieve high resolution without sacrificing the conversion rate. Compared to other alternatives, the two-step CT IΣΔ ADC exhibits the freedom of adjusting its accuracy and speed independently while featuring quite relaxed circuit specifications.
  • Keywords
    sigma-delta modulation; circuit specifications; conversion rate; pipelining two second-order CT IΣΔ ADC; two-step continuous-time incremental sigma-delta ADC;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2013.1096
  • Filename
    6550136
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=17865