• DocumentCode
    17867
  • Title

    Single Grain Boundary Dopingless PNPN Tunnel FET on Recrystallized Polysilicon: Proposal and Theoretical Analysis

  • Author

    Ram, Mamidala Saketh ; Abdi, Dawit Burusie

  • Author_Institution
    Dept. of Electron. & Commun. Eng., M.S. Ramaiah Inst. of Technol., Bengaluru, India
  • Volume
    3
  • Issue
    3
  • fYear
    2015
  • fDate
    May-15
  • Firstpage
    291
  • Lastpage
    296
  • Abstract
    A single grain boundary dopingless PNPN tunnel field effect transistor (TFET) on recrystallized polycrystalline silicon is studied by varying the position of the grain boundary in the channel. The performance of the proposed device is assessed using 2-D simulations. We establish the prospect of realizing low-cost thin-film recrystallized polycrystalline tunnel FETs with: 1) low OFF-state current and low sub-threshold swing (SS) and 2) an ON-state current similar to that of a comparable single grain boundary poly-silicon thin film transistor (TFT). Our results indicate that the proposed single grain boundary dopingless PNPN TFET could be an ideal substitute for the conventional TFTs making it appropriate for low power display applications as well as the driver circuits.
  • Keywords
    elemental semiconductors; field effect transistors; grain boundaries; recrystallisation; silicon; thin film transistors; tunnel transistors; field effect transistor; recrystallized polycrystalline silicon; single grain boundary dopingless PNPN tunnel FET; Grain boundaries; Junctions; Logic gates; Semiconductor process modeling; Silicon; Thin film transistors; PNPN TFET; Tunnel Field Effect Transistor (TFET); Tunnel field effect transistor (TFET); dopingless; glass substrates; grain boundary; poly-Si; simulation; thin film transistor (TFT);
  • fLanguage
    English
  • Journal_Title
    Electron Devices Society, IEEE Journal of the
  • Publisher
    ieee
  • ISSN
    2168-6734
  • Type

    jour

  • DOI
    10.1109/JEDS.2015.2392618
  • Filename
    7009956