Modeling and analysis of domain wall dynamics for robust and low-power embedded memory

Non-volatile memories are gaining significant attention for embedded cache application due to low standby power and excellent retention. Domain wall memory (DWM) is one possible candidate due to its ability to store multiple bits/cell in order to break the density barrier. Additionally, it provides low standby power, fast access time, good endurance and good retention. In this paper, we provide a physics-based model of domain wall that comprehends process variations (PV) and Joule heating. The proposed model has been used for circuit simulation. We also propose techniques to mitigate the impact of variability and Joule heating while enabling low-power and high frequency operation.