DocumentCode
1786890
Title
An efficient two-level DC operating points finder for transistor circuits
Author
Jian Deng ; Batselier, Kim ; Yang Zhang ; Ngai Wong
Author_Institution
Dept. of Electr. & Electron. Eng., Univ. of Hong Kong, Hong Kong, China
fYear
2014
fDate
1-5 June 2014
Firstpage
1
Lastpage
6
Abstract
DC analysis, as a foundation for the simulation of many electronic circuits, is concerned with locating DC operating points. In this paper, a new and efficient algorithm to find all DC operating points is proposed for transistor circuits. The novelty of this DC operating points finder is its two-level simple implementation based on the affine arithmetic preconditioning and interval contraction method. Compared to traditional methods such as homotopy, this finder offers a dramatically faster way of computing all roots, without sacrificing any accuracy. Explicit numerical examples and comparative analysis are given to demonstrate the feasibility and accuracy of the proposed approach.
Keywords
affine transforms; integrated circuit modelling; iterative methods; nonlinear equations; transistor circuits; DC analysis; affine arithmetic preconditioning; electronic circuits simulation; interval contraction method; transistor circuits; two-level DC operating points finder; two-level simple implementation; Accuracy; Computational modeling; Convergence; Integrated circuit modeling; Numerical models; Transistors; Vectors; DC analysis; inclusion method; nonlinear equations; transistor circuits simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE
Conference_Location
San Francisco, CA
Type
conf
DOI
10.1145/2593069.2593087
Filename
6881444
Link To Document