DocumentCode :
1786967
Title :
High-level synthesis for run-time hardware Trojan detection and recovery
Author :
Xiaotong Cui ; Kun Ma ; Liang Shi ; Kaijie Wu
Author_Institution :
Coll. of Comput. Sci., Chongqing Univ., Chongqing, China
fYear :
2014
fDate :
1-5 June 2014
Firstpage :
1
Lastpage :
6
Abstract :
Current Integrated Circuit (IC) development process raises security concerns about hardware Trojan which are maliciously inserted to alter functional behavior or leak sensitive information. Most of the hardware Trojan detection techniques rely on a golden (trusted) IC against which to compare a suspected one. Hence they cannot be applied to designs using third party Intellectual Property (IP) cores where golden IP is unavailable. Moreover, due to the stealthy nature of hardware Trojan, there is no technique that can guarantee Trojan-free after manufacturing test. As a result, Trojan detection and recovery at run time acting as the last line of defense is necessary especially for mission-critical applications. In this paper, we propose design rules to assist run-time Trojan detection and fast recovery by exploring diversity of untrusted third party IP cores. With these design rules, we show the optimization approach to minimize the cost of implementation in terms of the number of different IP cores used by the implementation.
Keywords :
hardware-software codesign; integrated circuit design; invasive software; design rules; golden IP; high level synthesis; integrated circuit development process; intellectual property cores; run time hardware Trojan detection; Educational institutions; Hardware; IP networks; Integrated circuits; Payloads; Schedules; Trojan horses; Hardware Trojan; IP; design for security; detection and recovery; high-level synthesis; run time;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE
Conference_Location :
San Francisco, CA
Type :
conf
Filename :
6881484
Link To Document :
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