DocumentCode :
1789063
Title :
Chaotic spread spectrum modulation — A hardware implementation approach
Author :
Kashyap, Kunal ; Sarma, Manash Pratim ; Sarma, Kandarpa Kumar
Author_Institution :
Dept. of Electron. & Commun. Eng., Gauhati Univ., Guwahati, India
fYear :
2014
fDate :
10-11 Oct. 2014
Firstpage :
1
Lastpage :
6
Abstract :
Spread spectrum modulation finds important place in wireless communication primarily due to its application in Code Division Multiple Access (CDMA) and so on. One of the critical issue in such modulation is the generation of spreading sequence. This paper presents a hardware approach for design of chaotic spreading sequence for application in a Direct Sequence Spread Spectrum (DS SS) system for a faded wireless channel. Enhancing the security of data transmission is a prime issue which can better be addressed with a chaotic sequence. Generation and application of chaotic sequence is done and a comparison with Gold sequence is presented which clearly indicates achieving better performance with simplicity of design. The primary blocks of the system are implemented using Verilog and the performances noted.
Keywords :
Gold codes; binary sequences; chaotic communication; code division multiple access; fading channels; spread spectrum communication; telecommunication security; CDMA; chaotic spread spectrum modulation; code division multiple access; data transmission security; direct sequence spread spectrum system; gold sequence; hardware implementation approach; spreading sequence generation; wireless channel; Binary phase shift keying; Bit error rate; Chaos; Gold; Hardware design languages; Logistics; DS SS; Gold code; Logistic map code; Verilog-HDL;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advances in Electronics, Computers and Communications (ICAECC), 2014 International Conference on
Conference_Location :
Bangalore
Type :
conf
DOI :
10.1109/ICAECC.2014.7002432
Filename :
7002432
Link To Document :
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