DocumentCode :
1790295
Title :
Linearity enhancement technique for one bit A/D converter in wireless communication devices
Author :
Kanemoto, Daisuke ; Sato, Takao ; Ohki, M. ; Muta, Osamu ; Furukawa, Hiroshi
Author_Institution :
Univ. of Yamanashi, Kofu, Japan
fYear :
2014
fDate :
22-25 June 2014
Firstpage :
1
Lastpage :
2
Abstract :
In this paper, a novel one bit resolution ADC for wireless communication devices is presented. If we use a conventional one bit resolution ADC for wireless communication devices, the communication quality becomes worse due to heavy non-linearity. To overcome this problem, we proposed a novel one bit resolution ADC circuit with linearity enhancement technique, which uses a S/H and a hysteresis comparator. By using hysteresis effect, the periodicity of one bit resolution ADC output signal can be reduced. Signal-to-Quantization-Noise Ratio (SQNR) can be improved by 6.4dB, thanks to the proposed technique.
Keywords :
analogue-digital conversion; comparators (circuits); radio receivers; sample and hold circuits; A/D converter; SQNR; communication quality; hysteresis comparator; hysteresis effect; linearity enhancement; sample and hold circuit; signal-to-quantization-noise ratio; wireless communication devices; word length 1 bit; Educational institutions; Hysteresis; Linearity; Receivers; Signal resolution; Simulation; Wireless communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics (ISCE 2014), The 18th IEEE International Symposium on
Conference_Location :
JeJu Island
Type :
conf
DOI :
10.1109/ISCE.2014.6884368
Filename :
6884368
Link To Document :
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