Drain current improvement using spacer and charge plasma concept

Author

Agrawal, Ishu ; Kondekar, P.N.

Author_Institution

Dept. of Electron. & Commun. Eng., PDPM IIITDM, Jabalpur, India

fYear

2014

fDate

22-25 June 2014

Firstpage

1

Lastpage

2

Abstract

In this paper, we have proposed the new structure of T-FET and analyzed the impact of spacer dielectric, device width, metal electrodes and temperature on Tunnel Field Effect Transistor (T-FET). A numerical TCAD device simulator 3-D ATLAS version 2.10.18.R shows that reducing the width will reduce the effective threshold voltage. Transistor with a high I_ON /I_OFF ratio of 10¹⁰ sub-threshold swing of 54 mV/dec for the channel length of 50 nm with Hafnium oxide as gate dielectric material of thickness 3 nm and spacer dielectric as the silicon dioxide material.

Keywords

dielectric materials; electric charge; electrodes; field effect transistors; hafnium compounds; semiconductor device models; silicon compounds; technology CAD (electronics); 3D ATLAS version 2.10.18.R; HfO₂; SiO₂; T-FET; TCAD device simulator; charge plasma concept; device width; drain current improvement; effective threshold voltage; hafnium oxide gate dielectric material; metal electrodes; silicon dioxide material; spacer dielectric; tunnel field effect transistor; Band to band tunneling; Gated p+-i-n+ diode; double gate (DG); sub threshold swing (SS); tunnel field effect transistor (T-FET);

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics (ISCE 2014), The 18th IEEE International Symposium on

Conference_Location

JeJu Island

Type

conf

DOI

10.1109/ISCE.2014.6884470

Filename

6884470